News

EDN

Altera unveils Quartus II software version 8.1

The folks at Altera have unveiled their Quartus II software version 8.1 for CPLD, FPGA, and HardCopy ASIC designs. Based on internal benchmarks, the folks at Altera claim high-density FPGA compile ...
EDN

Altera’s Quartus II Software Version 11.1 Delivers Arria V and Cyclone V FPGA Support and Productivity Improvements

“Support for Arria V and Cyclone V FPGAs allows designers to meet performance requirements and achieve the lowest power in the industry at 28 nm, while lowering system cost in a wide range of ...
Hackaday

CPLD Tutorial: Learn Programmable Logic The Easy Way

The guys over at hackshed have been busy. [Carl] is making programmable logic design easy with an 8 part CPLD tutorial. (March 2018: Link dead. Try the Wayback Machine.) Programmable logic devices are ...
Design-Reuse

Altera's Quartus II Software Version 11.0 Features the Production Release of Qsys System Integration Tool

San Jose, Calif., May 9, 2011—Altera Corporation (Nasdaq: ALTR) today announced the release of its Quartus ® II software version 11.0, the industry’s number one software in performance and ...